Arteris Accelerates Industry Transition to Multi-Die Chiplet-Based Architecture

semiconductor-digest.com Sep 17, 2026

Arteris Accelerates Industry Transition to Multi-Die Chiplet-Based Architecture

Curated by Shubham · TechCapsules · Sep 17, 2026

AI-summarised brief · reviewed before publication

Arteris, Inc. announced an expansion of its multi‑die portfolio aimed at easing semiconductor firms’ shift from monolithic system‑on‑chip (SoC) designs to chiplet‑based architectures for AI, high‑performance computing (HPC) and consumer electronics. The new FlexGen Multi‑Die network‑on‑chip (NoC) IP extends connectivity across die‑to‑die links using a single UCIe PHY, cutting PHY area, power and I/O needs by up to 50 % and adding virtual‑channel link technology and quality‑of‑service controls for non‑coherent AI and HPC workloads. It complements the existing Ncore Multi‑Die solution for cache‑coherent systems and integrates with Arteris’ Magillem automation and Cycuity security tools. Together, the suite lets engineering teams reuse designs, simplify integration and maintain performance as they partition systems across multiple silicon dies.

💡 Why It Matters

· By preserving NoC intelligence across chip boundaries, Arteris removes a major bottleneck that has slowed the adoption of larger, heterogeneous chiplet ecosystems.
· This accelerates time‑to‑market for next‑generation AI and HPC products.

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