TechCapsules

AI-summarised brief · reviewed before publication

Silicon quantum hardware developer Quobly and microelectronics research institute CEA‑Leti expanded their partnership, granting Quobly direct access to the European FAMES Pilot Line at CEA‑Leti in Grenoble. The pilot line, part of the Chips JU initiative, offers advanced tools for 3D integration, RF control layers, and embedded non‑volatile memory on 300 mm FD‑SOI substrates. Quobly’s QSOI® architecture merges spin‑qubit arrays with cryogenic control electronics on a single die, aiming to scale qubit density and pulse‑control performance without enlarging thermal or physical footprints. The collaboration bridges exploratory R&D and commercial foundry runs at STMicroelectronics, with Quobly targeting cloud availability of its Alloy Pioneer processor by late 2026 and long‑term scaling toward fault‑tolerant silicon architectures by 2032.