TetraMem Announces 22nm Multi-Level RRAM Analog In-Memory Computing SoC Milestone
semiconductor-digest.com May 19, 2026

TetraMem Announces 22nm Multi-Level RRAM Analog In-Memory Computing SoC Milestone

AI-summarised brief · reviewed before publication

TetraMem Inc. announced the successful tape-out and initial silicon validation of its MLX200 platform, a 22nm multi-level RRAM-based analog in-memory computing system-on-chip. This achievement marks a significant step toward commercializing analog computing architectures based on emerging non-volatile memory technologies. The MLX200 platform integrates multi-level RRAM arrays with mixed-signal compute engines, enabling high-throughput vector-matrix operations within memory. Early silicon results indicate consistent functionality across arrays, supporting the viability of this approach for embedded non-volatile memory and compute-in-memory applications. The milestone builds on TetraMem's earlier work, demonstrating the feasibility of bringing multi-level RRAM into advanced-node commercial silicon, with evaluated sampling expected in the second half of 2026.

💡 Why It Matters

  • · By performing computation directly within memory arrays, TetraMem's technology reduces data movement and improves system-level efficiency, addressing a major bottleneck in modern AI systems.
  • · This breakthrough enables the development of more energy-efficient and scalable AI systems.