IBM, ORNL, and AMD Deploy Co-Located Quantum Error Correction Platform in Poughkeepsie
quantumcomputingreport.com Nov 6, 2026

IBM, ORNL, and AMD Deploy Co-Located Quantum Error Correction Platform in Poughkeepsie

AI-summarised brief · reviewed before publication

IBM, Oak Ridge National Laboratory, and AMD have installed a quantum error‑correction testbed in IBM’s Poughkeepsie facility. The platform co‑locates IBM’s 120‑qubit Quantum Nighthawk r2 processor with ORNL’s Umbra HPC cluster, powered by AMD Instinct MI355X GPUs and 5th‑gen EPYC CPUs. By eliminating network latency, the setup enables real‑time syndrome decoding at 100,000 circuits per second, supporting hierarchical error‑correcting codes. Initial experiments target condensed‑matter physics, aligning quantum simulations with data from ORNL’s Spallation Neutron Source.

💡 Why It Matters

  • · The low‑latency integration demonstrates a viable path toward fault‑tolerant quantum systems, a critical hurdle for scalable quantum computing.
  • · It also bridges quantum and classical supercomputing, accelerating research in materials science and neutron scattering.