Imec and EV Group Demonstrate Wafer-to-Wafer Hybrid Bonding with 200nm Interconnect Pitch and Record High Overlay Accuracy
AI-summarised brief · reviewed before publication
Imec and EV Group demonstrated a robust wafer-to-wafer hybrid bonding technology at 200nm Cu interconnect pad pitch, with a record high Cu pad alignment accuracy. The technology was demonstrated on a test vehicle with routable interconnects, achieving a Cu pad-to-pad post-bond overlay vector below 40nm for 100% of the dies. This breakthrough was enabled by co-optimizing critical elements of imec's hybrid bonding process flow and EVG's cutting-edge hybrid and fusion wafer bonding system. The achievement supports logic-to-logic and memory-to-logic tier stacking use cases, as envisioned in imec's CMOS 2.0 scaling paradigm. Imec and EVG intend to further advance the wafer-to-wafer hybrid bonding roadmap, driving interconnect pitch below 200nm.
💡 Why It Matters
- · High-density logic layer stacking requires extremely high interconnect densities, which can only be offered by advanced wafer-to-wafer hybrid bonding technology.
- · Imec's CMOS 2.0 scaling paradigm relies on this technology to enable future compute system architectures.
