Nikon Unveils Digital Lithography System for Advanced Semiconductor Packaging

semiconductor-digest.com Oct 14, 2026

Nikon Unveils Digital Lithography System for Advanced Semiconductor Packaging

Curated by Shubham · TechCapsules · Oct 14, 2026

AI-summarised brief · reviewed before publication

Nikon Corporation announced the DSP‑110 digital lithography system, set for release in April 2027, targeting semiconductor advanced packaging. The new machine delivers 1.5 µm line‑and‑space resolution and 72 panels per hour throughput, roughly 40 % faster than its predecessor, the DSP‑100, which offers 1.0 µm resolution. The DSP‑110’s redesigned optical system expands focus margin and supports large substrates, enabling stable patterning for high‑density wiring on interposers and multilayer FC‑BGA packages. Nikon’s in‑house optics development underpins the performance gains.

💡 Why It Matters

· By boosting throughput and expanding focus tolerance, the DSP‑110 reduces production costs and improves yield for high‑density packaging, a critical need as chip complexity rises.

Capsules Semiconductors

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Kulicke & Soffa Earns 2026 SEMI Award for North America at SEMICON…

Kulicke & Soffa received the 2026 SEMI Award for North America at SEMICON West for its formic acid in situ bonding technology, a fluxless thermocompression bonding (TCB) method that delivers hybrid‑bonding performance at lower cost. The award recognizes the company’s breakthrough in overcoming scaling challenges at 50‑micron pitches and below, enabling ultra‑fine interconnects under 10 microns for heterogeneous integration and silicon photonics. The technology, integrated into the APTURA platform, supports wafers, substrates, and 310‑mm panels. The honor marks Kulicke & Soffa’s 75th anniversary and its role as a founding SEMI member.

💡 The award underscores a pivotal shift toward cost‑effective, high‑density interconnects essential for AI and high‑performance computing, positioning Kulicke & Soffa as a key enabler of next‑generation semiconductor integration.

semiconductor-digest.com · Oct 14

Semiconductor Sustainability Needs a Whole-Fab View, Not a Point-of-Use Fix

At SEMICON West, Edwards’ Environmental Sustainability Manager Chris Jones urged a holistic view of semiconductor fab sustainability, arguing that focusing solely on high‑GWP fluorinated gases overlooks the broader ecosystem that drives emissions. Jones highlighted that emissions depend on tool operation, gas flows, equipment condition, and utility quality, linking Scope 1, Scope 2, water use, waste handling, lifecycle carbon, and supply‑chain pressures. He cautioned that isolated abatement can shift impacts elsewhere, stressing the need for integrated control to minimize total environmental burden.

💡 By framing fab operations as an interconnected system, the industry can avoid “tunnel vision” on single metrics and instead target genuine, cumulative reductions across energy, chemicals, and waste.

semiconductor-digest.com · Oct 13

Tower Semiconductor and Semtech Expand SiGe Manufacturing Partnership for AI Data Centers

Tower Semiconductor and Semtech announced a renewed multi‑year SiGe manufacturing partnership, extending a 20‑year collaboration. Semtech will secure dedicated silicon germanium capacity at Tower’s fabs in the United States, Israel, and Japan to support its growing AI data‑center optical interconnect portfolio. The agreement targets high‑speed analog front‑end components—TIAs, modulators, laser drivers, and equalizers—needed for 800 Gbps to 3.2 Tbps links. The partnership builds on recent award‑winning 224 Gbps TIAs and aims to secure supply resilience for future AI interconnect generations.

💡 By locking in SiGe capacity across three regions, the deal ensures that AI data‑center networks can scale bandwidth without supply bottlenecks, directly addressing the rising power cost of data movement in large clusters.

semiconductor-digest.com · Oct 13

Advanced Energy Launches Temperature Measurement System for Semiconductor Processing

Advanced Energy Industries unveiled the Centra Smart Hub at SEMICON West, pairing it with Remote Smart Sensors to deliver precise wafer-temperature measurement for lamp-heated silicon and silicon carbide processes. The system offers up to 40% greater accuracy at 3.3 µm or 5.2 µm wavelengths, reaching temperatures up to 1700 °C. Designed for rapid thermal annealing and epitaxial growth, it integrates ECAT and Ethernet protocols for seamless system compatibility. The technology promises higher throughput, uniformity, and yield in semiconductor fabs.

💡 By overcoming infrared lamp interference that hampers conventional pyrometers, the new platform enables reliable temperature control in high‑temperature processes, directly boosting production efficiency and product quality.

semiconductor-digest.com · Oct 13

Fujifilm to Expand CMP Slurry Production Capacity in the U.S.

Fujifilm Corporation announced an $18 million investment to expand its copper interconnect CMP slurry production at its Mesa, Arizona facility. The expansion will add multi‑product manufacturing lines for CMP slurries used in advanced logic, memory, and packaging processes, including hybrid bonding. Production is slated to begin in 2027, bridging R&D and commercial output. The move responds to rising demand driven by AI‑related semiconductor growth and positions Fujifilm to supply a broad portfolio across global manufacturing sites.

💡 By scaling its CMP slurry output, Fujifilm strengthens the supply chain for high‑performance chips, ensuring manufacturers can meet the escalating throughput required for AI and next‑generation devices.

semiconductor-digest.com · Oct 13

ETEL Launches METIS HP High-Precision Motion Platform

ETEL announced the METIS HP, a full‑air‑bearing planar motion platform aimed at step‑and‑scan semiconductor processes such as direct laser writing and high‑resolution optical inspection. The system supports panels up to 600 mm × 600 mm and delivers ±150 nm positioning accuracy across the XY stroke, ±150 nm dynamic straightness at velocities up to 1 m/s, and accelerations of 20 m/s². A multi‑degree‑of‑freedom HEIDENHAIN encoder provides drift‑free measurement and enables projected tool‑point readout, while ETEL’s controller can generate a TTL position trigger, eliminating the need for interferometer mirrors and reducing cost and air‑lens effects. The platform also includes a 4‑DoF high‑bandwidth module for precise Z, tip, tilt and theta adjustments, targeting maskless lithography and packaging inspection. METIS HP is available for OEM integration, will be shown at SEMICON West.

💡 By removing interferometer mirrors, the METIS HP cuts system complexity and latency, enabling faster wafer‑level patterning essential for emerging maskless lithography. Its sub‑150 nm accuracy at 1 m/s lets inspection tools keep pace with higher‑throughput production lines.