RAMageddon: 3 tips to handle the rising cost of computer memory

fastcompany.com Oct 10, 2026

RAMageddon: 3 tips to handle the rising cost of computer memory

Curated by Shubham · TechCapsules · Oct 10, 2026

AI-summarised brief · reviewed before publication

A global shortage of dynamic random‑access memory (DRAM) has emerged as AI data centers aggressively purchase chips to build future networks, outpacing the semiconductor industry’s ability to increase production. Bottlenecks in specialized components limit supply, driving RAM prices to volatile, “lobster‑like” levels that can swing daily and have risen as much as fivefold in a short period. While the surge may seem abstract to casual users, it directly inflates costs for custom PC builders, gamers, and manufacturers of devices that embed computing power, from smartphones to tractors. The article outlines three practical strategies for consumers to mitigate the impact of soaring memory prices, emphasizing budgeting, alternative sourcing, and timing purchases to market fluctuations.

💡 Why It Matters

· Escalating RAM costs ripple through every product that relies on embedded computing, tightening budgets for both hobbyists and manufacturers alike.

Capsules Semiconductors

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AMD EPYC Verano Trades Server Upgradeability for Record Memory Bandwidth

AMD has announced that its forthcoming EPYC Verano AI host processor will employ a soldered, non‑removable socket architecture, breaking from the field‑serviceable design used in all previous EPYC platforms. The new platform, identified as “Socket SB1” in Dynatron’s SB1‑4U‑ACTIVE cooler listing, is intended for EPYC 9006 LP processors targeting AI rack head nodes. The listing indicates up to 72 Zen 6 cores, a 5 GHz boost clock, and LPDDR5X memory via SOCAMM2 modules. The cooler’s specifications mirror those used for AMD’s larger SP7 socket, though the processor’s TDP remains unspecified.

💡 The shift to a soldered BGA package signals a strategic move toward higher memory bandwidth and tighter integration, potentially redefining upgrade paths and maintenance models for AI‑centric data centers.

techtimes.com · Oct 10

Europe Pairs Its Own CPU With Silicon Spin Qubits in First All-Indigenous…

French chip designer SiPearl and Grenoble‑based quantum startup Quobly signed a non‑exclusive memorandum of understanding on 9 October 2026 to test integration of SiPearl’s Rhea1 processor – Europe’s first sovereign server CPU – with Quobly’s silicon spin‑qubit quantum processor fabricated on STMicroelectronics’ 300 mm commercial line. Both firms have already demonstrated functional hardware: Rhea1 completed a twelve‑week bring‑up in August, while Quobly achieved single‑chip gate execution, readout, and two‑qubit operations. The MoU aims to create a hybrid high‑performance computing‑quantum architecture and to compete for a share of the €119 million European quantum funding programme whose deadline is in November. Success would prove that a classical CPU and a quantum chip can communicate across extreme temperature differentials using entirely European‑sourced technology.

💡 It shows Europe can build a fully indigenous quantum‑classical hybrid system, removing reliance on foreign classical hosts and paving the way for sovereign high‑performance computing.

thestar.com.my · Oct 10

Exclusive-Sequoia-backed chip startup Nuvacore raising funds at about a $2.5 billion valuation,…

Six‑month‑old microchip startup Nuvacore is courting hundreds of millions of dollars at an estimated $2.5 billion valuation to build a data‑center‑focused central processor, sources said. The company, founded by former Apple executive Gerard Williams and engineers John Bruno and Ram Srinivasan, has no product yet but plans to design core chip functionality before committing to a specific architecture such as x86 or Arm, aiming to optimise for AI‑heavy workloads like those powering chat‑bots. The fundraising follows a seed round led by Sequoia Capital and joins a wave of silicon‑valley chip ventures that are securing billion‑dollar valuations despite long development cycles. Investors have poured $10.7 billion into semiconductor startups in the first five months of 2026, outpacing the full‑year 2025 total.

💡 Nuvacore’s architecture‑agnostic approach could reshape how data‑center CPUs are built, potentially bypassing entrenched x86 and Arm constraints.

techtimes.com · Oct 10

Samsung Used HBM4 Memory Supply Monopoly to Force AMD Into Foundry Talks

AMD CEO Lisa Su traveled to Seoul on Oct. 7 to secure a multi‑year supply of Samsung’s HBM4 memory for the company’s Helios AI rack platform, which requires 31 TB of HBM4 per system. While the public agenda focused on memory, sources say Samsung leveraged AMD’s urgent need to open talks about moving AMD’s CPU and GPU production to Samsung’s 2 nm SF2P process. Samsung and SK Hynix dominate HBM output; SK Hynix has allocated most of its 2026 capacity to Nvidia, leaving AMD dependent on Samsung. Samsung has used this dependency as bargaining power to pursue its first high‑volume advanced‑node logic contract with AMD, a customer historically served by TSMC and GlobalFoundries. The negotiations remain confidential and no foundry deal has been signed.

💡 Samsung is turning a supply bottleneck into a foothold in advanced‑node logic, potentially reshaping the competitive landscape of semiconductor manufacturing.

smttoday.com · Oct 9

Plasma for Stable Surface Processes in Chip Manufacturing

At SEMICON Europe in Munich (Nov. 10‑13, 2026), German firm Plasmatreat showcased its plasma‑based surface‑treatment portfolio for semiconductor fabrication at Booth 567, Hall C1. The company demonstrated four systems: the low‑pressure AURORA‑Plasma line, the dielectric‑barrier‑discharge GlowPlasma for uniform wafer treatment, Openair‑Plasma jets designed for particle‑free, potential‑free processing, and a dry‑oxide‑reduction process for metallic contacts. Plasmatreat explained that precise control of surface chemistry—removing organic residues, reducing oxides, and enhancing wetting and adhesion—is essential for downstream steps such as die attach, wire and hybrid bonding, under‑fill, molding and encapsulation, which directly affect yield and reliability. The vendor emphasized matching each plasma technology to substrate material, purity demands, and cleanroom automation requirements to ensure stable process windows across the semiconductor manufacturing flow.

💡 Reliable surface conditioning eliminates a major source of variability in advanced chip assembly, enabling higher yields without redesigning downstream equipment.

kalkinemedia.com · Oct 9

Are Edge Chips Giving BrainChip (ASX:BRN) a Fresh Lease of Life? –…

BrainChip Holdings Ltd, a Sydney‑based neuromorphic chip developer, has intensified outreach to developers and investors amid a broader slump in semiconductor stocks. The company focuses on low‑power, event‑driven processors that emulate brain‑like signal processing for edge applications such as sensors, wearables, vehicles and defense systems. Over the past month, BrainChip has showcased its Akida technology at industry events, including an ASX‑hosted webinar, and has highlighted its licensing model and development boards. The push aims to attract attention to its niche market while navigating dilution concerns and limited commercial traction.

💡 By positioning itself at the edge, BrainChip offers a viable alternative to data‑center AI, potentially reshaping power‑constrained device markets. Its renewed visibility could attract investment and partnerships that drive adoption of neuromorphic solutions.